Making chips intelligent

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dc.contributor.authorRao, V. Ramgopal
dc.date.accessioned2026-04-02T10:17:19Z
dc.date.available2026-04-02T10:17:19Z
dc.date.issued2025-12-15
dc.description.abstractA 3-nanometre transistor is no longer science fiction; it is inside the phone in your pocket. Yet classical silicon is gasping. The next leap will come from nanoelectronics: new materials, new device physics, and integration at atomic precision. This includes today’s scaled CMOS, powering everything from AI chips to edge devices. This is not just about making chips smaller. It is about making them smarter, cheaper, and greener.en_US
dc.identifier.urihttps://www.financialexpress.com/business/news/shrinking-devices-expanding-possibilities/4075304/
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/20848
dc.language.isoenen_US
dc.publisherFinancial Expressen_US
dc.subjectNanoelectronicsen_US
dc.subject3-Nanometre transistorsen_US
dc.subjectScaled CMOS technologyen_US
dc.subjectUltra-low-power IoT devicesen_US
dc.titleMaking chips intelligenten_US
dc.typeArticleen_US

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