Memristor–CMOS hybrid ultra-low-power high-speed multivibrators

Abstract

Memristor–CMOS (MCM) technology enables fabrication of thin film memristors over the conventional CMOS devices and has the potential to significantly reduce the silicon-area and propagation delays in VLSI chips. The memristor not only has an extremely very useful characteristic of non-volatile memory, but also has the advantage of significantly lesser ON resistance Ron and lesser undesired parasitic capacitance as compared to MOSFETs. Innovative MCM hybrid re-configurable circuits can outperform conventional CMOS-only design and hence are being considered as an important device for future digital VLSI applications. This paper presents applications of TiO2−x–TiO2 memristor for digital multivibrator circuits at 45 nm CMOS technology node. The threshold adaptive memristor SPICE model has been used for design and performance-benchmarking of the proposed MCM multivibrators in circuit simulator (cadence®) at 45 nm technology node. The proposed new MCM mono-stable vibrator has a delay of merely 16 ps (98% lower delay than similar CMOS design) and requires a 45% lesser silicon area. Similarly, the proposed new MCM bi-stable vibrator has a delay of merely 5 ps (87% lower delay than similar CMOS design) and requires a 25% lesser silicon area. Moreover, the proposed MCM mono-stable and bi-stable multivibrators consume merely 0.1 μW and 0.5 μW of power, respectively, as compared to the 0.47 μW and 0.98 μW power required by corresponding CMOS-only multi-vibrators. The overall decrease in power delay product is 99% and 94%, respectively, in the proposed MCM mono-stable and bi-stable multivibrators as compared to the corresponding conventional CMOS-only multivibrators.