Parallel Multipliers: Architectural Exploration and Designing
| dc.contributor.author | Sahoo, Subhendu Kumar | |
| dc.date.accessioned | 2022-05-21T03:47:05Z | |
| dc.date.available | 2022-05-21T03:47:05Z | |
| dc.date.issued | 2006 | |
| dc.description | Supervisor(s): Shekhar, Chandra | en_US |
| dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/4896 | |
| dc.language.iso | en | en_US |
| dc.publisher | BITS Pilani | en_US |
| dc.subject | Electrical & Electronics Engineering | en_US |
| dc.subject | Parallel Multipliers | en_US |
| dc.subject | Architectural Exploration | en_US |
| dc.subject | Exploration and Designing | en_US |
| dc.title | Parallel Multipliers: Architectural Exploration and Designing | en_US |
| dc.type | Thesis | en_US |
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