Design of 10-bit Digital to Analog Converter Using Cascaded Operational Amplifier Topology
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Date
2009
Authors
Journal Title
Journal ISSN
Volume Title
Publisher
ACEEE
Abstract
This paper proposes an approach for designing a
R-2R 10 bit Digital to Analog Converter (DAC) which could
be made to operate at low voltage supply by efficiently
exploiting the cascaded Operational Amplifier (Op-Amp)
architecture. The DAC operates at a 3V power supply with
a settling time of 50-100ns , dynamic range of around 50-60
dB for signals upto a frequency of 10Mhz. Graph &
simulation results are provided to verify the stability of the
Op-Amp used in DAC
Description
Keywords
EEE, Cascaded Op-Amp Topology, DAC, Digital to Analog Converter