Performance optimization of 60 nm channel length vertical MOSFETs using channel engineering

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dc.contributor.authorRao, V. Ramgopal
dc.date.accessioned2023-11-07T09:04:06Z
dc.date.available2023-11-07T09:04:06Z
dc.date.issued2001
dc.description.abstractA comprehensive study has been performed to optimize the electrical characteristics of delta doped channel MOSFETs (D2FETs) having channel length of 60 nm. Extensive 2D device simulations have been employed to show that D2FETs exhibit higher drain current drive and reduced short channel and hot carrier effects compared to MOSFETs having uniform channel doping. The improvement has been found significant when the delta peak is shifted near the source end of the channel. Device simulations show acceptable short channel effects for 60 nm D/sup 2/FETs when the gate oxide thickness is reduced to the 2.5-3 nm regime.en_US
dc.identifier.urihttps://ieeexplore.ieee.org/document/902703
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12893
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectOptimizationen_US
dc.subjectMOSFETsen_US
dc.subjectMolecular beam epitaxial growthen_US
dc.subjectMedical simulationen_US
dc.subjectDoping profilesen_US
dc.subjectElectric variablesen_US
dc.titlePerformance optimization of 60 nm channel length vertical MOSFETs using channel engineeringen_US
dc.typeArticleen_US

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