On-Chip Intelligent Frequency Scaling using Artificial Neural Networks

dc.contributor.authorGupta, Anu
dc.date.accessioned2023-02-11T04:14:43Z
dc.date.available2023-02-11T04:14:43Z
dc.date.issued2020
dc.description.abstractDynamic Voltage and Frequency Scaling (DVFS) is a popular method for reducing power consumption. Several DVFS techniques have been used for manually triggering a change in frequency to save power. This paper proposes a novel lightweight on-chip neural network (Kohonen Self-Organizing Maps) for user-behavior based frequency scaling to improve CPU performance, which senses and classifies the user-behavior based on the utilization of the processor and memory components and assigns appropriate frequency to achieve significant performance boost, while also obtaining mild power savings, and catering to multiple user-behaviors. Also, since the hardware of the ANN is implemented on-chip, no communication of data is required, thus, reducing the overhead of the implementation appreciably. The proposed technique has been evaluated on Intel i7-4720HQ Haswell processor and has shown performance boost by up to 47%, while saving up to 6% SoC power, simultaneously, as compared to the existing DVFS technique.en_US
dc.identifier.urihttps://ieeexplore.ieee.org/document/9342296
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9171
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectDynamic voltage and frequency scalingen_US
dc.subjectKohonen Self-Organizing Mapsen_US
dc.subjectCPU utilizationen_US
dc.titleOn-Chip Intelligent Frequency Scaling using Artificial Neural Networksen_US
dc.typeArticleen_US

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