Some system design considerations for a high switching frequency PWM inverter
| dc.contributor.author | Kumar, Rajneesh | |
| dc.date.accessioned | 2023-03-03T09:33:52Z | |
| dc.date.available | 2023-03-03T09:33:52Z | |
| dc.date.issued | 2007-12 | |
| dc.description.abstract | A sinusoidal PWM inverter is required to faithfully reproduce the control waveforms at the output with minimum distortion. This paper presents some design considerations for such an inverter. The choice of switching frequency is the main criterion which affects the output voltage harmonic distortion at high switching frequencies. This paper shows that there exists an optimum switching frequency above which the output harmonic distortion becomes more visible. The dead time generator circuit for a low cost inverter and effect of driver circuits on the output waveform are discussed. Experimental results from laboratory models are presented | en_US |
| dc.identifier.uri | https://www.tandfonline.com/doi/abs/10.1080/00207210701751212 | |
| dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9474 | |
| dc.language.iso | en | en_US |
| dc.publisher | Taylor & Francis | en_US |
| dc.subject | EEE | en_US |
| dc.subject | Voltage source inverter | en_US |
| dc.subject | SPWM | en_US |
| dc.subject | Low order harmonics | en_US |
| dc.subject | High switching frequency | en_US |
| dc.subject | Output distortion | en_US |
| dc.title | Some system design considerations for a high switching frequency PWM inverter | en_US |
| dc.type | Article | en_US |
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