Hardware Software Co-design of k-means Clustering Algorithm

Abstract

The k-means clustering algorithm is a method that is frequently utilized for the purpose of grouping data points considering their similarity. Within the scope of this research, we investigate the viability of using a hardware-software co-design (HSC) strategy in order to speed up the k-means algorithm's execution. The studies are carried out using a Zedboard HSC platform based on Zynq 7000 architecture, which incorporates both processing system (PS) part implemented as set of instructions as software component and programmable logic (PL) part implemented on configurable FPGA fabric as hardware component using RTL code. In implementing k-means clustering algorithm, calculations of distance are carried out by PS and the results are communicated to PL, for performing the distance comparison & cluster reassignment. In order to reduce the resource utilization and the execution time, three different design configurations are being studied using HSC approach where the PL part follows different architectures. The results show comparison of execution speed, resource utilization and power when the different design architecture for the PL part are compared.