A hardware optimized low power RNM compensated three stage operational amplifier with embedded capacitance multiplier compensation

Abstract

This paper proposes a hardware optimized low power three stage compensated operational amplifier with a capability of driving a wide range of capacitive loads ranging from 200pF to 5nF. The amplifier is compensated by implementing Embedded Capacitance Multiplier (CM) Compensation on the outer Miller capacitor of traditional Reverse Nested Miller Compensation (RNMC) with a feed forward stage. This provides a unity gain bandwidth (UGB) greater than 1MHz and phase margin greater than 60° for the range of loads mentioned above. The circuit has a 100uW of DC power dissipation for a 2V supply. The proposed technique uses two compensation capacitances of 1pf and 500fF only. The design achieves a unity gain bandwidth of 9.227MHz at 500pF capacitive load. The simulation is carried for 180nm CMOS technology in Cadence Virtuoso environment.