Design of Energy Efficient Schedulers for Multicore Hard Real Time Systems
| dc.contributor.author | Gawali, Shubhangi | |
| dc.date.accessioned | 2022-04-29T09:23:08Z | |
| dc.date.available | 2022-04-29T09:23:08Z | |
| dc.date.issued | 2018-03 | |
| dc.description | Supervisor: Biju K. Raveendran and Bharat M. Deshpande | en_US |
| dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/4503 | |
| dc.language.iso | en | en_US |
| dc.publisher | BITS, Pilani | en_US |
| dc.subject | Computer Science | en_US |
| dc.subject | Multicore Hard Real Time Systems | en_US |
| dc.title | Design of Energy Efficient Schedulers for Multicore Hard Real Time Systems | en_US |
| dc.type | Thesis | en_US |
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