Pre-layout estimation of performance and design of basic analog circuits in stress enabled technologies

dc.contributor.authorMishra, Neeraj
dc.date.accessioned2025-01-08T10:21:10Z
dc.date.available2025-01-08T10:21:10Z
dc.date.issued2015-06
dc.description.abstractIn stress enabled technologies the drive strength of multi-fingered (MF) transistors varies with the number of fingers (NF) because of Layout Dependent Effect (LDE). This is an important issue because MF transistors are widely used in integrated circuits. In this paper, we investigate performance variability issues in basic analog building blocks, such as current mirrors, common source amplifiers, and single ended differential amplifiers, designed using MF transistors. We observe that, due to the layout dependent channel mechanical stress, the analog performance parameters of these building blocks vary significantly. When the NF in MF transistors varies from one to seven, we observe that the copy current in cascode current mirrors vary by ~15%. For similar change in the NF there is ~22% and ~24% change in the bandwidth (BW) and the output resistance (R out ) respectively of an nMOS common source amplifier with pMOS current source load. We observe variations of ~32% in slew rate (SR), ~28% in BW, and ~12.4% in R out with the change in NF in a single ended differential amplifier. We model these variations as a function of NF in MF transistors since performance predictability in analog circuits is important. Finally, we designed a common source amplifier considering the impact of channel length on channel stress.en_US
dc.identifier.urihttps://ieeexplore.ieee.org/abstract/document/7208062
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/16753
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectCommon Source Amplifieren_US
dc.subjectCurrent Mirroren_US
dc.subjectDifferential Amplifieren_US
dc.subjectMulti-Fingered Transistoren_US
dc.subjectStressen_US
dc.titlePre-layout estimation of performance and design of basic analog circuits in stress enabled technologiesen_US
dc.typeArticleen_US

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