Browsing by Author "Kandpal, Kavindra"

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    Adaptation of a compact SPICE level 3 model for oxide thin-film transistors
    (Springer, 2019-05) Gupta, Navneet; Kandpal, Kavindra
    Oxide thin-film transistors (TFTs) and metal–oxide–semiconductor field-effect transistors (MOSFETs) operate via different conduction mechanisms but exhibit similar device characteristics. In this work, a SPICE level 3 model originally defined for MOSFETs is successfully adapted to provide a behavioral model for oxide TFTs. This adapted compact model is applicable to all kinds of oxide TFTs, irrespective of the channel and dielectric material used. To capture the TFT behavior efficiently, the experimental characteristic of an oxide TFT is used to set various SPICE level 3 parameters.
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    Effect of thickness on the properties of ZnO thin films prepared by reactive RF sputtering
    (Springer, 2018) Gupta, Navneet; Kandpal, Kavindra; Shekhar, Chandra
    This work reports structural and electrical properties of ZnO thin film deposited by reactive RF sputtering at the room temperature, for thin film transistor (TFT) applications. To study the thickness dependent effect, ZnO thin film of thicknesses 100, 200 and 800 nm were deposited over p-type silicon substrate. Structural properties of thin films have been characterized using X-ray Diffraction (XRD) and Atomic Force Microscopy (AFM). XRD analysis of 100 and 200 nm thick films shows dominant cubic phase of ZnO along with small presence of ZnO2, while; XRD analysis of 800 nm thick film confirms strong c-axis growth of wurtzite (W) ZnO. The XRD result confirm the polycrystalline nature of the thin film and shows that crystallinity improves with the film thickness. The AFM results confirm high step coverage of deposited thin films. From the thermionic transport model across the grain boundary it was observed that with an increase in film thickness mobility of carriers increases. The sheet resistance of undoped 100 and 200 nm ZnO film is found to be approximately 7 × 1011 Ω/□; while, the sheet resistance of 800 nm thick ZnO film shows almost 10 time reduction to 6.025 × 1010 Ω/□, owing to its improved crystallinity.
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    Investigations on high-κ dielectrics for low threshold voltage and low leakage zinc oxide thin-film transistor, using material selection methodologies
    (Springer, 2016-02) Gupta, Navneet; Kandpal, Kavindra
    This paper presents the investigations on high-κ dielectrics for low operating voltage and low leakage zinc oxide thin film transistor (ZnO TFT) using three material selection methodologies namely Ashby, technique for order preference by similarity to ideal solution (TOPSIS) and VlseKriterijumska Optimizacija I Kompromisno Resenjein in Serbian (VIKOR). Various material properties such as dielectric constant, conduction band offset to ZnO, band-gap and temperature coefficient mismatch of high κ to ZnO are investigated to find out the most promising gate dielectric material. The analysis concludes that lanthanum oxide (La2O3) is the most promising gate dielectric material for ZnO TFT transistor. The result shows a good agreement between Ashby’s, TOPSIS and VIKOR approaches.
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    Material Selection Techniques in Materials for Electronics
    (Springer, 2020-02) Gupta, Navneet; Kandpal, Kavindra
    Material selection is an important step prior to the actual fabrication of any electronic device. Owing to the availability of large set of materials, it is important to select the best possible material in order to enhance the performance of a device. Material selection approaches provide an easy way to recognize the trade-offs between conflicting materials properties and also to select the optimal material for better device performance. In addition to this, these approaches also help us to provide ranking to the alternatives from best to worst. Therefore, these approaches provide a platform to select and prioritize the possible materials and also provide support to perform rigorous evaluation of the possible alternatives. This chapter describes material selection methodologies in detail and explains the steps to be taken for each methodology to find out the most promising material for a given device.
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    On the Threshold Voltage and Performance of ZnO-Based Thin-Film Transistors with a ZrO2 Gate Dielectric
    (Springer, 2020) Gupta, Navneet; Kandpal, Kavindra; Shekhar, Chandra
    In the past few years, thin-film transistor (TFT) technology has experienced a rapid transition from amorphous silicon- (a-Si:H) and polysilicon-based TFTs to zinc oxide (ZnO)-based TFTs, and because of this transition, transparent TFTs have become a reality. In ZnO TFTs, which operate in accumulation mode, the threshold voltage has remained ambiguous due to the existence of grain boundary traps in the polycrystalline semiconducting channel. This paper provides an analytical relationship of threshold voltage with grain boundary trap density by assuming the grain boundary is a continuous onedimensional line charge. A high density of grain boundary traps leads to a high threshold voltage. However, its effect can be minimized by employing a high-j gate dielectric. In this work, we have demonstrated the reduction of threshold voltage in a ZnO TFT by using ZrO2 as a gate dielectric. A study of a ZnO/ZrO2 interface is reported by fabricating a metal–insulator–semiconductor capacitor structure. This interface is studied using capacitance–voltage (C–V) and current–voltage (I–V) characteristics. The ZnO TFT with a ZrO2 gate dielectric exhibits a low subthreshold slope (131 mV decade 1), low gate leakage current density (2.94 9 10 7 A cm 2) and low threshold voltage (1.2 V). However, it also exhibits a counterclockwise hysteresis of 1.4 V, which is attributed to the existence of oxygen vacancies.
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    Perspective of zinc oxide based thin film transistors: a comprehensive review
    (Emerald, 2018-01) Kandpal, Kavindra; Gupta, Navneet
    he purpose of this paper is to present a comprehensive review on development and future trends in zinc oxide thin film transistors (ZnO TFTs). This paper presents the development of TFT technology starting from amorphous silicon, poly-Si to ZnO TFTs. This paper also discusses about transport and device modeling of ZnO TFT and provides a comparative analysis with other TFTs on the basis of performance parameters
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    Study of structural and electrical properties of ZnO thin film for Thin Film Transistor (TFT) applications
    (Springer, 2017-07) Gupta, Navneet; Kandpal, Kavindra
    This work reports the room temperature deposition of undoped ZnO thin film using RF magnetron sputtering technique for thin film transistor (TFT) applications. RF sputtered ZnO thin film of thicknesses 100 and 200 nm were deposited over n-type silicon (Si) substrate using 99.9% pure ZnO target. For the deposition of ZnO thin films, a deposition pressure of 28 mTorr and RF power of 50 W was maintained. The gas flow rate was 5 and 20 sccm for oxygen and argon respectively. Structural and surface morphological characterization was done using X-ray diffractometer (XRD), X-ray photoelectron spectroscopy (XPS), field emission scanning electron microscopy (FE-SEM) and atomic force microscopy (AFM) techniques. XRD analysis of the thin film gives a dominant X-ray diffraction peak corresponding to strong c-axis oriented phase of hexagonal wurtzite structure of ZnO. The XRD results confirm the polycrystalline nature of the thin film and shows crystallinity improvement with increase in film thickness. Further, FESEM results confirm that the grain size increases with the film thickness. The surface roughness is studied through AFM while surface elemental survey is done using XPS. To measure the resistivity of deposited films, four point probe method was used. The resistivity of undoped 100 nm thick ZnO film is found to be 4.47 kΩ cm, while the resistivity of undoped 200 nm thick ZnO film reduces to 724.13 Ω cm because of improved crystallinity.
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    Study of ZnO/BST interface for thin-film transistor (TFT) applications
    (Elsevier, 2021-04) Gupta, Navneet; Kandpal, Kavindra; Shekhar, Chandra
    This work presents an investigation of ZnO/BST interface for the potential use of (Ba,Sr)TiO3 as a gate–dielectric in ZnO based thin-film transistors (TFTs) for low-voltage operation. A metal-insulator-semiconductor capacitor (MIS-C) structure, which consists of a Pt/BST/ZnO stack, was fabricated on a corning glass substrate. The capacitance-voltage (C-V) characteristic of MIS-C gives the capacitance peak in both forward and backward sweep. This peak behavior of BST is due to its paraelectric nature attributed by changing the direction of a polar molecule over the applied electric field. C-V curve of ZnO/BST MIS-C structure exhibits a counter-clockwise hysteresis of -1.33 V due to the existence of donor-like oxygen vacancies present in BST and ZnO interface. The subthreshold slope of the device was found to be 203 mV/ decade and calculated using the measurement of interface state density (Dit). ZnO/BST interface also exhibits a very low value of leakage current density (3.148 × 10−7 Acm−2). Thus, the use of BST as a gate-dielectric in ZnO TFT has excellent potential, owing to its steep subthreshold slope, which implies fast switching and low off-state current.