BITS Faculty Publications
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Item Effect of trap states at the oxide-silicon interface in polycrystalline silicon thin-film transistors(World Scientific, 2008) Gupta, NavneetThis work presents the study of the effect of trap states at the oxide-silicon interface in lightly doped polycrystalline silicon thin-film transistors with large grains. In this study, it is assumed that the oxide-silicon interface traps are evenly distributed throughout the interface region and single grain boundary is present in the channel of poly-Si TFT. It is shown that improved device characteristics can be obtained by reducing the gate oxide thickness. It is also observed that as gate oxide thickness decreases for a constant value of trap state density in the oxide-silicon interface, the gate voltage required for channel formation is lowered and leads to a decrease in threshold voltage of the device. Calculated and experimental results are also found to be well consistent with each other.Item Investigation on material selection for gate dielectric in nanocrystalline silicon (nc-Si) top-gated thin film transistor (TFT) using Ashby’s, VIKOR and TOPSIS(Springer, 2015-08) Gupta, NavneetIn this paper, various possible materials for the gate dielectric of nc-Si top-gated thin film transistor (TFT) and their material properties like dielectric constant, bandgap, conduction band offset and interface trap density are taken into consideration and Ashby’s, VlseKriterijumska Optimizacija I Kompromisno Resenje in Serbian (VIKOR) and Technique for order preference by similarity to ideal solution (TOPSIS) approaches are applied to select the most suitable gate dielectric material. The analysis results suggest that Si3N4 is the most suitable gate dielectric material for the better performance of nc-Si top-gated TFT. The results shows good agreement between Ashby’s, VIKOR and TOPSIS approaches.Item Model for threshold voltage instability in top-gated nanocrystalline silicon thin film transistor(Springer, 2016-01) Gupta, NavneetThe analytical model for the threshold voltage instability in top-gated staggered nanocrystalline silicon thin-film transistor is reported. This novel model includes the effect of various physical parameters like grain size, gate insulator thickness, doping density and grain boundary trapping state on the threshold voltage shift which is never reported earlier. It is observed that the higher trap density, greater doping concentration and larger gate insulator thickness provide lesser threshold voltage shift. Further, it is found from the results of grain size analysis that if grain size is smaller than threshold voltage shift decreases with decrease in grain size. However, if grain size is larger (Dg>20nm) then device become stable and shows negligible threshold voltage shift. In this paper, threshold voltage shift under gate bias voltage is also analyzed and result reveals that threshold voltage increases with the bias voltage. The calculated results are compared with experimental data. The close match between the two confirms the validity of proposed study.Item Two dimensional simulation and analysis of density-of-states ( DOS ) in top-gated nanocrystalline silicon thin film transistor ( nc-Si TFT )(IJNeaM, 2017) Gupta, NavneetIn this paper, we have presented the effect of the density-of-states (DOS) parameters on the performance of n-channel top gated staggered nc-Si TFT. The analysis was performed using ATLAS 2D TCAD simulator from SILVACO. The variation in DOS in nc-Si material and thus on the TFT device performance occurred by altering the channel length and channel quality is presented. The simulation results reveal that the increase in channel length and the degradation in channel quality degrade the trans-conductance and drain current. By iterating the order of parasitic resistance and the value of characteristic decay energy related to material quality, the same trend is achieved for simulated and experimental results for nc- Si TFT with W/L=200μm/50μmItem Study of structural and electrical properties of ZnO thin film for Thin Film Transistor (TFT) applications(Springer, 2017-07) Gupta, Navneet; Kandpal, KavindraThis work reports the room temperature deposition of undoped ZnO thin film using RF magnetron sputtering technique for thin film transistor (TFT) applications. RF sputtered ZnO thin film of thicknesses 100 and 200 nm were deposited over n-type silicon (Si) substrate using 99.9% pure ZnO target. For the deposition of ZnO thin films, a deposition pressure of 28 mTorr and RF power of 50 W was maintained. The gas flow rate was 5 and 20 sccm for oxygen and argon respectively. Structural and surface morphological characterization was done using X-ray diffractometer (XRD), X-ray photoelectron spectroscopy (XPS), field emission scanning electron microscopy (FE-SEM) and atomic force microscopy (AFM) techniques. XRD analysis of the thin film gives a dominant X-ray diffraction peak corresponding to strong c-axis oriented phase of hexagonal wurtzite structure of ZnO. The XRD results confirm the polycrystalline nature of the thin film and shows crystallinity improvement with increase in film thickness. Further, FESEM results confirm that the grain size increases with the film thickness. The surface roughness is studied through AFM while surface elemental survey is done using XPS. To measure the resistivity of deposited films, four point probe method was used. The resistivity of undoped 100 nm thick ZnO film is found to be 4.47 kΩ cm, while the resistivity of undoped 200 nm thick ZnO film reduces to 724.13 Ω cm because of improved crystallinity.Item Perspective of zinc oxide based thin film transistors: a comprehensive review(Emerald, 2018-01) Kandpal, Kavindra; Gupta, Navneethe purpose of this paper is to present a comprehensive review on development and future trends in zinc oxide thin film transistors (ZnO TFTs). This paper presents the development of TFT technology starting from amorphous silicon, poly-Si to ZnO TFTs. This paper also discusses about transport and device modeling of ZnO TFT and provides a comparative analysis with other TFTs on the basis of performance parametersItem Electronic Behavior of Nanocrystalline Silicon Thin Film Transistor(Springer, 2017-10) Gupta, NavneetThin film transistor (TFT) plays an important role for the fabrication of highly functional active matrix backplanes for large area display applications such as organic light emitting diodes (OLEDs). Nanocrystalline silicon (nc-Si) has recently achieved lot of interest over existing hydrogenated amorphous silicon (a-Si:H) and polycrystalline silicon (poly-Si) due to its superior properties which makes it suitable channel material for the fabrication of TFTs. In present work, the physical insight into the nc-Si TFT device characteristics and device non idealities is reported which can provide important step for the production of high performance large area display devices.