BITS Faculty Publications
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Item Highly sensitive thermal sensor design using a gate-bias-controlled TCR in MoSe2 FET(IEEE, 2025-05) Rao, V. RamgopalTemperature coefficient of resistance (TCR) is an important property for the design of thermal sensors. It is calculated as per the relative shift in electrical resistance for every degree of thermal variation. Furthermore, tunable TCR implies controlling the TCR through the manipulation of gate voltage. In this article, we have investigated the TCR tunability of the layered semiconductor material molybdenum diselenide (MoSe2) with gate-bias control. Atomic force microscope (AFM) is used to measure flake height, and Raman spectroscopy is used to characterize the MoSe2 flakes. Their TCR is higher by about two times that of MoS2 and five times that of metallic films, which are typically around 0.5% K −1 . Its TCR can be tuned to about two times higher than its value for 15-nm-thick flake within a gate voltage change of 7 V, with the highest recorded value being −2.75% K −1 . Similarly, 65-nm-thick flake has a TCR tunability of 4.5 times higher than the minimum value. Additionally, the average relative uncertainty in TCR is observed to be 3.8% for the 65-nm devices and 4.6% for the 15-nm devices, respectively.Item Bridging Innovation Gaps: India’s Path to Nanoelectronics Dominance by 2047(NIScPR-CSIR, 2024) Rao, V. RamgopalAs India ascends to its place as the world’s most populous nation1, it stands on the cusp of a technological revolution that could transform its economic landscape. By 2047, the centenary of India’s independence, the country has the potential to emerge as a global powerhouse in nanoelectronics. However, to realise this vision,-RHME QYWX SZIVGSQI WMKRMƼGERX GLEPPIRKIW MRGPYHMRK FVMHKMRK XLI KET FIX [IIR VIWIEVGL ERH MRRSZEXMSR fostering stronger academia-industry collaborations, and building a robust ecosystem for deep-tech startups.Item High stakes chips for India’s semiconductor push(Springer Nature, 2024-09) Rao, V. RamgopalIn the past decade, India’s start up ecosystem has flourished, giving rise to more than 100 unicorns, or start-up companies valued at more than $1billion USD. None of those were in the semiconductor space. That absence presents an immense opportunity. The stakes in the semiconductor industry are extraordinarily high. These tiny chips are the foundation for critical technologies like artificial intelligence (AI), quantum computing, and renewable energy. Yet, building a thriving semiconductor ecosystem is no easy task. Startups in this space need long gestation periods and capital requirements that dwarf those of other sectors. For context, advanced semiconductor fabrication plants (fabs) demand investments exceeding $10 billion. In a country like India, where such infrastructure is still in its infancy, this represents a daunting challenge. However, India is not starting from scratch. An estimated 20% of the global semiconductor engineering workforce is of Indian origin, an impressive intellectual asset. Despite this, India’s semiconductor startup sector has struggled to generate significant financial returns. By May 2024, India's semiconductor-related exits amounted to a modest half a billion dollars. Israel, with a smaller talent pool, boasts over $50 billion in exits. The difference lies not just in technical expertise but in the ecosystem that nurtures these startups. In the semiconductor sector, innovators claim most profits, while manufacturers get slimmer margins1. What does Israel do differently? It has fostered an environment where technical talent, market awareness, and active corporate ventures come together. Israeli startups aim for global leadership, leveraging their agility and innovation in competitive markets. The Indian semiconductor sector, however, has traditionally focused on servicing multinational corporations rather than creating indigenous intellectual property. This service-driven model has limited our ability to carve out a space in the competitive global market.Item Self-Functional Off-Stoichiometry Polymeric Materials: Potential for Tunable Plasmonic Application(ACS, 2023-10) Rao, V. RamgopalSelf-functional polymeric materials are of paramount importance in emerging lab-on-a-chip device development that finds various optical sensing applications. The unique surface functional characteristics make this polymer an ideal choice for the development of plasmonic sensing platforms. In this regard, a systematic experimental study was conducted to develop an off-stoichiometry thiol–ene–epoxy (OSTE+) platform by adjusting the stoichiometric ratio of the tetra-thiol moiety. The correlations between elastic moduli and optical properties of these flexible polymer thin films were investigated by comparing them to the molar concentrations of thiol, ene, and epoxy monomers. The unique tunable surface functional characteristics of these OSTE+ thin films were utilized for gold-nanoparticle-immobilized plasmonic surface development. The collective plasmonic resonance peak of the nanoparticles was modulated by optimizing the concentration of thiol groups (−SH). Changes in the chemical composition of −SH groups were correlated to the surface density of nanoparticles using X-ray photoelectron spectroscopy (XPS). These XPS measurements show covalent interactions between spherical gold nanoparticles and the available thiols that formed metal–thiol bonds (Au–S). The experimental observations of self-functional properties and the effect of the thiol-excess stoichiometry were correlated to the changes in binding energies of Au–S bonds due to nanoparticle interactions. This tunable plasmonic study of Au–S bonding with the sulfur or sulfide-mediated heteroatoms on the OSTE+ polymer surface has an extensive device innovation feasibility for light-manipulating sensing applications. Ultimately, this controllable thiol functionality of off-stoichiometry polymer thin films has enormous potential for the development of a single-polymer-based biocompatible surface for lab-on-chip devices.Item A Novel Thiol-Ene-Epoxy Polymer Based Optical Waveguide for Refractometric Sensing(IEEE, 2023-11) Rao, V. RamgopalThe utility of planar optical waveguides constructed from a novel thiol-ene-epoxy polymer has been demonstrated for refractive index sensing. The propagating modes supported by this planar structure were excited as well as taken out of the waveguide using the prism coupling method, and detected using an indigenously developed photodetector system comprising a commercial charge-coupled device (CCD) array and an Arduino microcontroller. The mode-dependent refractive index sensitivity was established by considering a monochromatic laser light excitation at 632.8 nm wavelength. The highest sensitivity of this waveguide sensor was found to be 21.84/RIU (refractive index units) and the corresponding refractive index resolution was 4.92 × 10 −4 RIU. The miniaturized version of this optical waveguide sensor has the potential to be integrated within a photonic system for plasmonic-based point-of-care device development.Item Heterogeneous CMOS-MEMS based Boost Converter for 2.4 GHz RF energy Harvester(IEEE, 2024) Rao, V. RamgopalInternet of Things (IoT) has experienced a significant growth in last few years. Billions of battery-powered wireless sensors are expected to be employed as the IoT becomes an integral part of our daily lives. Therefore, ambient energy resources such as light, RF source, EM radiation, thermal energy can be utilized to prolong the lifetime of batteries for sensors. In this work, ambient RF energy source is used for energy harvesting to power up the wireless sensors and low power electronic devices. For the first time, we experimentally demonstrated RF energy harvester to scavenge 2.45 GHz from Wi-Fi sources using commercially available CMOS-MEMS (micro electromechanical switch) hybrid switches. The use of MEMS switches in the boost converter instead of conventional NMOS switches reduces the leakage current, stabilize the ON-state resistance, and improves the overall efficiency. Our experimental result indicates that the use of MEMS switches increases the efficiency of the energy harvester more than 15% as compared to its NMOS counterpart.Item Radiation Induced Interface State Generation in Nitrided and Reoxidized Nitrided Gate Oxides(AIP, 1992-01) Rao, V. RamgopalReoxidized nitrided oxide is compared with nitrided oxides and dry SiO2 for radiation‐induced interface‐state generation (ΔDitm) and midgap voltage shifts (ΔVmg). The suppression of ΔDitm observed with heavy nitridation or reoxidation is explained in terms of the trapped‐hole recombination model together with the shifting of the location of the trapped positive charge away from the Si interface. This model can also explain the effect of nitrogen annealing on nitrided oxides.Item Simulation, fabrication and characterization of high performance planar-doped-barrier sub 100 nm channel MOSFETs(IEEE, 1997-12) Rao, V. RamgopalIn this paper we present experimental and simulation results on planar-doped-barrier MOSFETs (PDBFETs) and show the advantages that arise from the channel delta doping. Early and higher magnitude of velocity overshoot, suppression of avalanche multiplication, reduced hot-carrier problems are some of the advantages offered by PDBFETs over the conventional homogeneously doped MOSFETs in the sub 100 nm regime. Our low-temperature characterizations show clear ballistic transport in the fabricated 85 nm channel MOSFETs.Item The Planar-Doped-Barrier FET:MOSFET Overcomes Conventional Limitations(IEEE, 1997-10) Rao, V. RamgopalIntroducing a concept of Electric-Field-Tailoring in vertical grown MOSFETs significant improvements concerning supply voltage, current and speed are possible. Based on vertical Silicon MOSFETs with sub-100nm channel lengths Planar-Doped-BarrierFETs were fabricated. Investigations on electrical characteristics and carrier transport show the predicted improvements compared to classical MOSFETs.Item Sub-0.18 /spl mu/m SOI MOSFETs using lateral asymmetric channel profile and Ge pre-amorphization salicide technology(IEEE, 1998-10) Rao, V. RamgopalSOI devices are of great interest, especially for low power and low voltage applications. To achieve this goal, the device threshold voltage must be lowered while maintaining low sub-threshold leakage. However, when devices are downscaled, short channel effects (SCE) and hot carrier effects (HCE) also become severe issues in SOI MOSFETs. Symmetric halo implantations are widely used in bulk MOSFETs to improve SCE. Recently, asymmetric channel implantation or "pocket implantation" on the source end was introduced in bulk MOSFETs to adjust the threshold voltage and improve the device SCE and HCE. In this work, for the first time, we introduce large tilt angle implantation in the SOI MOSFET to form a lateral asymmetric channel (LAC) doping profile after gate formation. High concentration channel doping near the source end reduces DIBL and threshold voltage roll-off while low doping concentration near the drain side ensures high mobility. Furthermore, the peak electric field near the drain is reduced and impact ionization is less serious compared to conventional devices.