Optimization of Single Halo p-MOSFET Implant Parameters for Improved Analog Performance and Reliability

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dc.contributor.authorRao, V. Ramgopal
dc.date.accessioned2023-11-07T04:17:32Z
dc.date.available2023-11-07T04:17:32Z
dc.date.issued2002-09
dc.description.abstractSingle halo (SH) MOSFETs are recently proposed for mixed signal applications in view of their superior analog performance such as gain, transconductance, output resistance etc [1]. In this work, we investigate the hot carrier degradation behaviour of SH and conventional p-MOSFETs using specific stress conditions appropriate for analog applications. The degradation of analog device parameters due to Cannel Hot carrier (CHC) stress and its implications on circuit operation are discussed.en_US
dc.identifier.urihttps://ieeexplore.ieee.org/abstract/document/1503933
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12885
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectMOSFET circuitsen_US
dc.subjectImplantsen_US
dc.subjectDegradationen_US
dc.subjectCurrent measurementen_US
dc.subjectAnalog circuitsen_US
dc.subjectStress measurementen_US
dc.subjectVoltageen_US
dc.titleOptimization of Single Halo p-MOSFET Implant Parameters for Improved Analog Performance and Reliabilityen_US
dc.typeAnimationen_US

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