Characterization of lateral asymmetric channel (LAC) thin film SOI MOSFETs

dc.contributor.authorRao, V. Ramgopal
dc.date.accessioned2023-11-07T06:36:09Z
dc.date.available2023-11-07T06:36:09Z
dc.date.issued2001-10
dc.description.abstractThis paper presents results on the characterization of Lateral Asymmetric Channel (LAC) thin film silicon-on-insulator (SOI) MOSFETs. These devices are compared with conventional SOI MOSFETs having uniform channel doping. The measurements have been taken for a number of channel lengths, silicon film thicknesses, and tilt angles of implantation. The aspects studied include threshold voltage roll-off, kink effect, gate induced drain leakage (GIDL) and parasitic bipolar transistor action. Measurements have been supplemented by device simulations. The LAC devices show excellent characteristics, with many advantages over the conventional devices.en_US
dc.identifier.urihttps://ieeexplore.ieee.org/document/981564
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12888
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectLos Angeles Councilen_US
dc.subjectSemiconductor filmsen_US
dc.subjectThreshold voltageen_US
dc.subjectLength measurementen_US
dc.subjectThickness measurementen_US
dc.titleCharacterization of lateral asymmetric channel (LAC) thin film SOI MOSFETsen_US
dc.typeArticleen_US

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