Capacitance Degradation due to Fringing Field in Deep Sub-Micron MOSFETs with High-K Gate Dielectrics

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dc.contributor.authorRao, V. Ramgopal
dc.date.accessioned2023-11-07T10:39:09Z
dc.date.available2023-11-07T10:39:09Z
dc.date.issued1999-09
dc.description.abstractHigh-K gate dielectrics have been under extensive investigation for use in sub-lOOnm MOSFETs to suppress gate leakage. However, thicker gate dielectrics can result in degradation of the electrical performance due to increased fringing fields from the gate to source/drain. In this paper, the capacitance degradation resulting from this effect is analyzed and a simple technique to model this effect is presented.en_US
dc.identifier.urihttps://ieeexplore.ieee.org/document/1505464
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12903
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectCapacitanceen_US
dc.subjectDegradationen_US
dc.subjectMOSFETsen_US
dc.subjectDielectrics and electrical insulationen_US
dc.subjectHigh-K gate dielectricsen_US
dc.subjectGate leakageen_US
dc.subjectMOS devicesen_US
dc.titleCapacitance Degradation due to Fringing Field in Deep Sub-Micron MOSFETs with High-K Gate Dielectricsen_US
dc.typeArticleen_US

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