Department of Electrical and Electronics Engineering
Permanent URI for this collectionhttp://localhost:4000/handle/123456789/1925
Browse
Item Performance of Hybrid THz and Multiantenna RF System With Diversity Combining(IEEE, 202-11) Zafaruddin, S.M.Recent studies investigate single-antenna radio frequency (RF) systems mixed with terahertz (THz) wireless communications. This article considers a two-tier system of THz for backhaul and multiple-antenna-assisted RF for the access network. We analyze the system performance by employing both the selection combining and maximal ratio combining receivers for the RF link integrated with the THz link using the fixed-gain amplify-and-forward protocol. We develop the probability density function and the cumulative distribution function of the end-to-end signal-to-noise ratio (SNR) of the dual-hop system over independent and nonidentically distributed α – μ fading channels with a statistical model for misalignment errors in the THz wireless link. We use the derived statistical results to develop analytical expressions of the outage probability, average bit error rate, and ergodic capacity for the performance assessment of the considered system. We develop a diversity order of the system using asymptotic analysis in the high-SNR region, demonstrating the scaling of system performance with the number of antennas. We use computer simulations to show the effect of system and channel parameters on the performance of the hybrid THz-RF link with multiantenna diversity schemes.Item Modal Characteristics of a doubly clad step- index optical fiber- general analytical approach(Canadian Science Publishing, 1988) Chaubey, V.K.Using a fairly rigorous approach, a general characteristic equation for a doubly clad step-index fibre has been derived under the assumption that the refractive-index difference between the inner and outer cladding is small. Two different profiles, i.e., the W profile and the staircase profile, have been treated together and a discussion of their common characteristics has been made. Cutoff conditions for low-order modes have been obtained. For a certain range of values of the transverse-phase parameter ratio, the singly-clad fibre has greater mode cutoff V numbers than those of a doubly clad fibre. The analysis anticipates the possibility of obtaining greater cutoff V numbers for W-profile fibres.Item Modal attenuation in a four-layer metal-clad planar waveguide with a semi-parabolically graded guiding layer — an analytical study(Elsevier, 1991-04) Chaubey, V.K.A general characteristic equation is derived for a four-layer metal-clad graded-index slab waveguide with a guiding layer having a semi-parabolic refractive index profile. The attenuation parameter for the lowest-order TE and TM modes are computed and the results are presented and compared with those obtained by Al-Bader and Jamid for the three-layer case. We make similar calculations for a waveguide with a step-index guiding layer. The attenuation is found to be less sensitive to a change of the guiding layer width in the case of the four-layered structure with a parabolically graded guiding layer than it is for the corresponding three-layered structure. This situation is reversed in the case of a step-index waveguide. Thus the proposed four-layer planar waveguide shows some polarization discrimination properties which are significantly different from those of the three-layer waveguide.Item Radiation‐induced interface‐state generation in reoxidized nitrided SiO2(AIP, 1992-01) Rao, V. RamgopalReoxidized nitrided oxide is compared with nitrided oxides and dry SiO2 for radiation‐induced interface‐state generation (ΔDitm) and midgap voltage shifts (ΔVmg). The suppression of ΔDitm observed with heavy nitridation or reoxidation is explained in terms of the trapped‐hole recombination model together with the shifting of the location of the trapped positive charge away from the Si interface. This model can also explain the effect of nitrogen annealing on nitrided oxides.Item Radiation Induced Interface State Generation in Nitrided and Reoxidized Nitrided Gate Oxides(AIP, 1992-01) Rao, V. RamgopalReoxidized nitrided oxide is compared with nitrided oxides and dry SiO2 for radiation‐induced interface‐state generation (ΔDitm) and midgap voltage shifts (ΔVmg). The suppression of ΔDitm observed with heavy nitridation or reoxidation is explained in terms of the trapped‐hole recombination model together with the shifting of the location of the trapped positive charge away from the Si interface. This model can also explain the effect of nitrogen annealing on nitrided oxides.Item Field Intensity and Power Confinement of Four-layer Slab Waveguides with Various Refractive Index Profiles in the Guiding Region(De Gruyter, 1994) Chaubey, V.K.Relative field intensity distributions in three differenttypes of structures, i.e. Step index Slab Waveguide(SSW), Semi-parabolic index Slab Waveguide (SPSW)and Parabolic index Slab Waveguide (PSW) have beenanalytically derived and computed. It is found that thefield in the guiding region is maximum in case of thePSW structure. Analytical expressions for the relativepower confinement factors have also been obtained.The applicability of these results in the estimation ofcoupling coefficient of some of the Distributed FeedBack (DFB) lasers have also been briefly shown.Item Hysteresis behavior in 85-nm channel length vertical n-MOSFETs grown by MBE(IEEE, 1996-06) Rao, V. RamgopalVertical n-MOSFETs with channel lengths of 85 nm have been grown by MBE. For drain-to-source voltages V/sub DS/>3.3 V, these transistors exhibit hysteresis behavior similar to the reported behavior of fully depleted SOI-MOSFETs. Our results also show a gate voltage controlled turn-off of the drain current when the transistor is operating in the hysteresis mode. We have analyzed this behavior in vertical n-MOSFETs using 2-D device simulation and our results show a threshold value for the hole concentration across the source-channel junction which is required for the forward biasing of this junction. For a transistor operating in the hysteresis mode, we show that the potential barrier height for electron injection across the source-channel junction increases for increasing negative gate voltages during retrace. This results in a gate controlled turn-off of the drain current for SOI and vertical n-MOSFETs operating in the regenerative mode.Item Neutral electron trap generation under irradiation in reoxidized nitrided gate dielectrics(IEEE, 1996-09) Rao, V. RamgopalIn this study we report for the first time results on neutral electron trap generation in reoxidised nitrided oxide dielectrics under various radiation doses and bias conditions and compare the results with the conventional oxides. We see very little electron trap creation in RNO dielectrics for radiation doses up to 5 Mrad (Si) and for bias fields up to /spl plusmn/2.5 MV/cm. We explain our results in RNO and oxide dielectrics using a three step defect creation model.Item High-field stressing of LPCVD gate oxides(IEEE, 1997-03) Rao, V. RamgopalWe have investigated gate oxide degradation as a function of high-field constant current stress for two types of oxides, viz. standard dry and LPCVD oxides. Charge injection was done from both electrodes, the gate and the substrate. Our results indicate that compared to dry oxides, LPCVD oxides show reduced charge trapping and interface state generation for inversion stress. The degradation in LPCVD oxides with constant current stress has been explained by the hydrogen model.Item Charge trapping behaviour in deposited and grown thin metal-oxide-semiconductor gate dielectrics(Elsevier, 1997-03) Rao, V. RamgopalIn this study we compared the charge trapping characteristics of low pressure chemical vapour deposited (LPCVD) oxide and remote plasma enhanced chemical vapour deposited (RPECVD) oxide with two types of thermally grown oxide, namely high-pressure grown oxide (HIPOX) and the standard thermal dry oxide. The deposited oxides show enhanced Fowler-Nordheim tunnelling currents compared with the thermal oxides. Our results on charge trapping characteristics under high-field stressing and irradiation show that the deposited oxides exhibit very large electron trapping compared with the grown oxides and that these electron traps in the deposited oxides reside close to the Si-SiO2 interface and hence can affect the device reliability.Item The Planar-Doped-Barrier FET:MOSFET Overcomes Conventional Limitations(IEEE, 1997-10) Rao, V. RamgopalIntroducing a concept of Electric-Field-Tailoring in vertical grown MOSFETs significant improvements concerning supply voltage, current and speed are possible. Based on vertical Silicon MOSFETs with sub-100nm channel lengths Planar-Doped-BarrierFETs were fabricated. Investigations on electrical characteristics and carrier transport show the predicted improvements compared to classical MOSFETs.Item Simulation, fabrication and characterization of high performance planar-doped-barrier sub 100 nm channel MOSFETs(IEEE, 1997-12) Rao, V. RamgopalIn this paper we present experimental and simulation results on planar-doped-barrier MOSFETs (PDBFETs) and show the advantages that arise from the channel delta doping. Early and higher magnitude of velocity overshoot, suppression of avalanche multiplication, reduced hot-carrier problems are some of the advantages offered by PDBFETs over the conventional homogeneously doped MOSFETs in the sub 100 nm regime. Our low-temperature characterizations show clear ballistic transport in the fabricated 85 nm channel MOSFETs.Item On-line instantaneous and delayed control of a fast tubular reactor(IEEE, 1998) Bhanot, SurekhaA control system for the tubular reactor-unit has been synthesized, which is a combination of feedforward, feedback and inferential control configurations. The reactor chosen is fast; transient period for a given disturbance varies between 20 and 100 sec, as found from numerical simulation. Therefore a fast on-line control scheme using heuristic approach has been used in which disturbances, manipulated variables and control variables are correlated based on the steady state model of the reactor. Testing of the control scheme has been conducted for both instantaneous as well as delayed control action by numerical simulation.Item Plasma process induced abnormal 1/f noise behavior in deep sub-micron MOSFETs(IEEE, 1998) Rao, V. RamgopalThe effect of plasma damage on the MOSFET's flicker noise properties is examined in this work. We observe an abnormal noise peak in the 1/f noise spectrum at around 2 kHz which is a characteristic of the plasma damage. The dependence of the noise peak on the plasma induced degradation was studied in virgin n- and p-channel MOSFETs and this peak is shown to correlate well with the amount of damage in the p-MOSFETs.Item Electric field tailoring in MBE-grown vertical sub-100 nm MOSFETs(Elsevier, 1998-05) Rao, V. RamgopalWe introduce the concept of electric-field-tailoring in MBE-grown vertical metal-oxide semiconductor field-effect transistors (MOSFETs) and show that significant improvements in terms of supply voltage, current and speed are achievable in such MOSFETs by employing a planar-doped-barrier MOSFET (PDBFET) concept. Investigation of electrical characteristics and carrier transport in sub-100 nm channel PDBFETs shows the predicted improvements compared with classical MOSFETs.Item Charge injection using gate-induced-drain-leakage current for characterization of plasma edge damage in CMOS devices(IEEE, 1998-05) Rao, V. RamgopalIn this paper, we describe the application of gate-induced-drain-leakage (GIDL) current for the characterization of gate edge damage which occurs during the plasma etch processes. We show from experimental and simulation results that when the channel is biased in accumulation and with the drain-substrate junction reverse biased, charge injection is localized in the gate-drain overlap region. Under this localized charge injection (LCI) mode of operation, the gate voltage is a function of edge oxide thickness which in turn can be related to the plasma damage received during the poly-etch and subsequent spacer oxide formation. The detailed mechanism of localized charge injection for a study of plasma edge damage is explained along with the experimental demonstration of this technique using submicron MOSFET's.Item A Study of the Effect of Plasma Etch Damage on Sub-Micron MOSFET's Flicker Noise Properties(IEEE, 1998-09) Rao, V. RamgopalItem Sub-0.18 /spl mu/m SOI MOSFETs using lateral asymmetric channel profile and Ge pre-amorphization salicide technology(IEEE, 1998-10) Rao, V. RamgopalSOI devices are of great interest, especially for low power and low voltage applications. To achieve this goal, the device threshold voltage must be lowered while maintaining low sub-threshold leakage. However, when devices are downscaled, short channel effects (SCE) and hot carrier effects (HCE) also become severe issues in SOI MOSFETs. Symmetric halo implantations are widely used in bulk MOSFETs to improve SCE. Recently, asymmetric channel implantation or "pocket implantation" on the source end was introduced in bulk MOSFETs to adjust the threshold voltage and improve the device SCE and HCE. In this work, for the first time, we introduce large tilt angle implantation in the SOI MOSFET to form a lateral asymmetric channel (LAC) doping profile after gate formation. High concentration channel doping near the source end reduces DIBL and threshold voltage roll-off while low doping concentration near the drain side ensures high mobility. Furthermore, the peak electric field near the drain is reduced and impact ionization is less serious compared to conventional devices.Item Application of charge pumping technique for sub-micron MOSFET characterization(Elsevier, 1998-11) Rao, V. RamgopalIn this paper, charge pumping technique for MOSFET interface characterization will be reviewed. The basic principles of charge pumping technique will be elaborated and its evolution as an excellent tool for a thorough characterization of MOSFET interface properties will be illustrated. Published results regarding the applicability of charge pumping technique for a study of sub-micron MOSFET interface and its degradation under various electrical stress conditions and radiation will be analyzed. The effect of geometric components on charge pumping current as well as the recent reports of single interface trap characterization in sub-micron MOSFETs will be described. The application of charge pumping technique at cryogenic temperatures and in other MOS based devices will also be included.Item Flicker Noise in GaN/Al Ga N Doped Channel Heterostructure Field Effect Transistors(IEEE, 1998-12) Rao, V. RamgopalWe have investigated noise characteristics of novel GaN/Al0:15Ga0:85N doped channel heterostructure field effect transistors designed for high-power density applications. The measurements were carried out for various gate bias VGS and the drain voltage VDS varying from the linear to the saturation regions of operation VDS > 5 V. Our results show that flicker, e.g., 1=f noise, is the dominant limiting noise of these devices; and the Hooge parameter is on the order of 105 104. The gate voltage dependence of 1=f noise was observed in the linear region for all examined VGS and in the saturation region for VGS > 0. These results indicating low values of the Hooge parameter are important for microwave applications.