Department of Electrical and Electronics Engineering

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Now showing 1 - 20 of 2014

1-D TiO2 Nanorods Array-Based Parallel Electrode Sensor for Selective and Stable Detection of Organic Vapors
(IEEE, 2020-01) Hazra, Arnab; Gangopadhyay, Subhashis
A solid-state vapor sensor in parallel electrode configuration was fabricated by employing 1-D TiO 2 nanorods as a sensing layer. Highly ordered and oriented TiO 2 nanorods were synthesized on a Ti substrate by using hydrothermal method. X-ray diffraction (XRD), field emission scanning electron microscopy (FESEM) and transmission electron microscopy (TEM) were used to characterize the TiO 2 nanorods/Ti samples. The developed Au/TiO 2 nanorods/Ti type parallel electrodes sensor demonstrated the potential of integrated operations of both resistive and capacitive changes towards various concentrations (50-300 ppm) of volatile organic compounds (VOCs) like methanol, ethanol, 2-propanol, acetone and benzene at 50 °C. The resistive response magnitude of the sensor was found to be increased from 13 % to 87% while the capacitive response magnitude of the sensor was increased from 32 % to 200%, as methanol concentration was increased from 50 ppm to 300 ppm. However, the use of both modes enhances the selectivity performance of the sensor as the resistive mode exhibited better selectivity for a lower concentration of VOCs and the capacitive mode for higher concentration of VOCs. Moreover, the sensor showed a very good stability because of low operating temperature (50°C) as well as rutile (major) phase of TiO 2 nanorods.
1/f Noise in Drain and Gate Current of MOSFETs With High-k Gate Stacks Publisher: IEEE PDF
(IEEE, 2009-06) Rao, V. Ramgopal
In this paper, we investigate the quality of MOSFET gate stacks where high- k materials are implemented as gate dielectrics. We evaluate both drain- and gate-current noises in order to obtain information about the defect content of the gate stack. We analyze how the overall quality of the gate stack depends on the kind of high- k material, on the interfacial layer thickness, on the kind of gate electrode material, on the strain engineering, and on the substrate type. This comprehensive study allows us to understand which issues need to be addressed in order to achieve improved quality of the gate stack from a 1/ f noise point of view.
100 nm channel length MNSFETs using a jet vapor deposited ultra-thin silicon nitride gate dielectric
(IEEE, 1999) Rao, V. Ramgopal
Metal-nitride-semiconductor (MNS) FETs with channel lengths down to 100 nm with a novel jet vapor deposited (JVD) SiN insulator as gate dielectric are fabricated and characterized for their electrical performance. By employing the charge pumping technique, the SiN interface quality and its effect on the transistor performance are evaluated. We show that, compared to conventional SiO/sub 2/ MOSFETs, the SiN devices show lower gate leakage current, competitive drain current drive and transconductance, good interface quality, and reduced hot-carrier degradation.
A 12.11 mW, 99 pJ/Conv.-Step SAR ADC with Optimal Power Efficiency for IoT
(IEEE, 2024-12) Gupta, Anu; Shekhar, Chandra
This brief presents a capacitive charge scaling DAC architecture with a two-phase non-overlapping clocking scheme to make an energy-efficient Successive Approximation Register (SAR) data converter for Internet-of-Things (IoT) applications. The proposed architecture comprises a Track & Hold (T/H), a Modified Strong Arm Latch comparator (MSAL), a SAR Control logic, and a digital-to-analog (D/A) converter. The proposed work is simulated using Cadence Virtuoso in TSMC 180 nm and achieves a minimum sampling rate of 1 MS/s and power consumption of 12.11 mW. To address the effects of process variations and mismatches on ADC performance, this paper conducts a thorough 500-point Monte Carlo (MC) simulation of the proposed SAR ADC circuit. The measured results show a Signal-to-Noise Ratio (SNR) of 47.81 dB, a Spurious-Free Dynamic Range (SFDR) of 54.32 dB, and ENOB of 7.65 Bits.
2DEG modulation in double quantum well enhancement mode nitride HEMT
(Elsevier, 2015-11) Kumar, Rahul
A double quantum well (QW) based nitride HEMT has been conceptualized through numerical simulation of Schrödinger and Poisson's equations for enhancement mode operation by introduction of a deeper secondary QW along with primary AlGaN/GaN triangular potential well. The carriers for drain current are populated in the shallower primary QW through energy band bending with positive VGS. Participation of the concerned QW in drain current conduction depends upon the magnitude of the band offsets and polarization effects of the materials. Effect of the gate bias on energy band delineates the modulation of 2DEG carriers in the shallow energy quantum well from 1.6×10−3 cm−3 to 9.47×1017 cm−3 with gate bias from 0.5 V to 1.0 V to confirm the drain current conduction with Vth>+0.5 V at typical depth of source and drain Ohmic contacts.
3-D device matrix approach: A new algorithm for plotting energy band diagrams in semiconductors
(IEEE, 2012) Asati, Abhijit
Energy band diagram is one of the important results produced by a device simulator. In order to provide more flexibility and emphasis over this domain, an algorithm is presented which can be used to draw the device band diagram in any plane in either direction for a user specified biasing conditions. Algorithm uses a three dimensional matrix of the device, which is reduced to a two dimensional matrix and subsequently into a vector, after plane and line selection by user. Basics of device level tool development are highlighted through this approach. This work is useful to the students and device level engineers, offering them an interactive and flexible way to draw band diagram anywhere in the device. The algorithm implementation is modular and matrix based, which is done using MATLAB®.
3D TCAD based approach for the evaluation of nanoscale devices during ESD failure
(IEEE, 2010-11) Rao, V. Ramgopal
This paper demonstrates a 3D TCAD based approach towards the evaluation and pre-silicon development of nanoscale devices for advanced ESD protection concepts. Impact of various physical models and parameters on the accuracy of predicted ESD figures of merit are discussed. Moreover, various devices options, have been evaluated from 3D TCAD simulations.
5G in Healthcare: A Survey
(Taylor & Francis, 2023) Joshi, Sandeep
This text discusses problems and needs with the implementation of a 5G mobile communications system in the healthcare sector. It covers the issues related to advanced modulation schemes, telehealth, and remote diagnosis. It discusses important topics including virtual healthcare monitoring, spectrum sensing techniques, the role of 5G in medical applications, the role of nano- communication in healthcare informatics, and remote diagnosis. The text will be useful for graduate students, academic researchers, and professionals in the fields of electrical, and electronics and communication engineering, and allied healthcare. This book: Discusses novel architecture to manage the allocation of resources, and the interference issue among existing and advanced radios Provides focus to estimate the performance, cost and accommodation of the next generation technology design for the IoT, modern health- care, and education Covers advanced technologies and their role in healthcare Discusses key topics including spectrum access, advanced waveforms, which can help in standardization of 5G based smart hospital Explores the impact of telemedicine in smart healthcare This reference text covers the latest advances in the field of 5G mobile communication for healthcare informatics, addressing both original algorithm development and new applications of 5G mobile Communications.
5G network slice for digital real-time healthcare system powered by network data analytics
(Elsevier, 2021) Chamola, Vinay
In the wake of the COVID-19 pandemic, where almost the entire global healthcare ecosystem struggled to handle patients, it’s evident that the healthcare segment needs a virtual real-time digital support system. The recent advancements in technology have enabled machine-to-machine communication, enhanced mobile broadband, and real-time biometric data analytics. These could potentially fulfill the requirements of an end-to-end digital healthcare system. For building such a system, there is also a need for a dedicated and specialized communication network. Such a system will not only support dynamic throughput, latency and payload but also provide guaranteed QoS (Quality of Service) at every instant. The motive of our study was to define an implementable low-level architecture for the digital healthcare system by using the 5G Network Slice that incorporates all these features. Best-in-class wearable devices will collect the biometric data and transmit it via the 5G network slice. Data analytics is then applied to the collected data to build a knowledge graph used for quick predictions and prescriptions. The architecture also keeps in mind the security and integrity aspects of healthcare data.
720-Mbps 64-QAM-OFDM SCM transmission over RGB-LED-based FSO communication system
(IEEE, 2016) Singhal, Rahul
The paper proposes a 720 Mbps visible light communication (VLC) system using 64-QAM-OFDM signals. Transmission of signals is achieved by modulating red, green and blue (RGB) light emitting diodes (LEDs) and transmitting all three wavelengths over free space optical (FSO) channel after subcarrier multiplexing (SCM) of 64-QAM-OFDM signals on two RF carriers. The performance of the proposed scheme is evaluated for a free space distance under the effect of weak as well as strong scintillations. Data transmission with bit error rates under pre-FEC limit (3.8×10 -3 ) is achieved up to 1.2 meters through the proposed VLC system
A 8-bit SAR ADC using current mode approach for bio-medical applications
(IEEE, 2014) Shenoy, Meetha V.
This paper deals with the design of a SAR-ADC with 8-bit resolution suited for bio-medical application. The design of the key components of the SAR ADC namely, DAC, Comparator and Sample and Hold circuit (S/H) has been carried out using current mode approach with the DAC operating at sub-threshold regime. The input current range is 10nA to 2.57μA with 10nA as the LSB. The circuit has been designed in UMC 180nm technology Twin-Well Process.
A 8-resistor SU-8 accelerometer with reduced cross axis sensitivity
(IEEE, 2010) Rao, V. Ramgopal
The MEMS accelerometer has a high cross sensitivity due to proof mass being eccentric. This paper gives results for a SU-8 z-axis accelerometer that uses 8-resistor Wheatstone-bridge to reduce the x-axis and y-axis cross sensitivity by 2 orders of magnitude compared to the conventional 4-resistor Wheatstone-bridge arrangement.
Ab Initio Study of Carbon Nanotube Field Effect Transistor Gas Sensor for Detection of Ammonia and Nitrogen Dioxide Gas
(IEEE, 2022-07) Gupta, Navneet; Chaturvedi, Nitin
Lebel-free sensors are capable for sensing low concentration of gas molecules. In this article, the importance of Carbon Nanotube Field Effect Transistor (CNFET) is described for gas sensing application. The first principal study to investigate the CNFET to detection of low concentration of ammonia (NH 3 ) and nitrogen dioxide (NO 2 ) gas molecules. By discussing the electronic and transport properties of CNFET, we find that CNFET can be used for gas sensing applications. Detailed analysis of binding energy, e-k diagram, density of state (DOS), device density of state (DDOS), transmission pathways and current-voltage (I-V) characteristics configuration have been performed using density functional theory (DFT) and non-equilibrium green function (NEGF) method. It has been observed that CNFET can be used for the potential application of gas sensor at room temperature. Out theoretical findings are corroborated with experimental data and this virtual device structure can be converted into physical device to get nano dimensions integrated gas senso
ABB Assisted Area Efficient Vernier Delay Line Time-to-Digital Converter for Low Voltage Applications
(IEEE, 2023-11) Mishra, Neeraj
We propose an Adaptive Body Biasing (ABB) assisted method for the improvement in resolution and reduction in on-chip area of time-to-digital converter (TDC). The proposed method also improves the metastability window with reduced hold time while maintaining the setup time same as conventional architecture of True Single-Phase Clock (TSPC) D flip flops (DFFs). In this article, we use Positive Edge Triggered (PET) TSPC DFFs for our analysis, which exhibit a significant hold time but benefit from a zero-setup time. Further, with the application of ABB, the desired delay difference between the delay lines of Vernier TDCs is achieved without having any area overhead. The simulation work is carried out using a 28 nm Fully Depleted Silicon-On-Insulator (FDSOI) technology node of STMicroelectronics (STM) at a voltage supply (V DD ) of 0.6 V.
Accurate Iris Localization Using Edge Map Generation and Adaptive Circular Hough Transform for Less Constrained Iris Images
(IJECE, 2016-08) Gupta, Anu; Asati, Abhijit
This paper proposes an accurate iris localization algorithm for the iris images acquired under near infrared (NIR) illuminations and having noise due to eyelids, eyelashes, lighting reflections, non-uniform illumination, eyeglasses and eyebrow hair etc. The two main contributions in the paper are an edge map generation technique for pupil boundary detection and an adaptive circular Hough transform (CHT) algorithm for limbic boundary detection, which not only make the iris localization more accurate but faster also. The edge map for pupil boundary detection is generated on intersection (logical AND) of two binary edge maps obtained using thresholding, morphological operations and Sobel edge detection, which results in minimal false edges caused by the noise. The adaptive CHT algorithm for limbic boundary detection searches for a set of two arcs in an image instead of a full circle that counters iris-occlusions by the eyelids and eyelashes. The proposed CHT and adaptive CHT implementations for pupil and limbic boundary detection respectively use a two-dimensional accumulator array that reduces memory requirements. The proposed algorithm gives the accuracies of 99.7% and 99.38% for the challenging CASIA-Iris-Thousand (version 4.0) and CASIA-Iris-Lamp (version 3.0) databases respectively. The average time cost per image is 905 msec. The proposed algorithm is compared with the previous work and shows better results.
Activate Zeolite Filter: A gas sensor signal stabilization and enhancement
(IEEE, 2019) Benedict, Samatha
In this report, we investigate zeolite as a humidity filter by optimizing its heating temperature providing constant humidity to the gas sensor chip. The metal oxide semiconductor (MOS) based gas sensor signals are prone to humidity and temperature variations which causes difficulty in distinguishing the sensor response. The baseline drift of MOS sensor, their signal stability and repeatability are achieved by heated zeolite filter assembly as part of packaged sensor. The sensor package consists of a sandwich of zeolite powder and nichrome wire, which controls the humidity and temperature of the sensor. With the packaged filter and sensor assembly, the recorded humidity and temperature near the sensor chip are 35±5% RH and 40±5°C when the external humidity and temperature is varying from 30 to 80% RH and 21 to 35°C. NO 2 sensor is investigated with and without the filter for proof of concept to check the sensor stability and repeatability.
An active clamp coupled inductor-based soft-switched quadratic boost converter
(Wiley, 2022-12) Kumar, Rajneesh
This paper proposes a novel active clamp-based quadratic boost converter to achieve a high gain output voltage. The converter combines a quadratic boost converter with a voltage doubler circuit using a coupled inductor. An active clamp circuit with an auxiliary switch is used to utilize the usually wasted energy of leakage inductance and clamp the voltage to a certain limit. The combination of leakage inductance and parasitic capacitance of the main switch provides the benefit of zero voltage switching (ZVS) in both MOSFETs. Similarly, output diodes operating under zero current switching (ZCS) improve the overall efficiency of the converter. Voltage doubler and active clamp circuitry reduce the voltage stress on solid-state devices; hence, a low Rds,on device is selected. The converter model is simulated using PSIM software and calculated maximum efficiency of ~95% for 200 W and measured maximum efficiency of ~93% for 190 W power level including various parasitic elements.
Active Power Filter Control Algorithm using Wavelets
(IEEE, 2006) Kumar, Rajneesh; Gupta, Karunesh Kumar
This paper presents a wavelet transform (WT) based technique to extract fundamental frequency component from a nonsinusoidal and unbalanced load current in a three phase system. The fundamental frequency component is extracted using multiresolution analysis (MRA). The remaining harmonics can be used by the active filter for compensation. Simulation result obtained for a rectifier load current shows the usefulness of the proposed method.
Adaptation of a compact SPICE level 3 model for oxide thin-film transistors
(Springer, 2019-05) Gupta, Navneet; Kandpal, Kavindra
Oxide thin-film transistors (TFTs) and metal–oxide–semiconductor field-effect transistors (MOSFETs) operate via different conduction mechanisms but exhibit similar device characteristics. In this work, a SPICE level 3 model originally defined for MOSFETs is successfully adapted to provide a behavioral model for oxide TFTs. This adapted compact model is applicable to all kinds of oxide TFTs, irrespective of the channel and dielectric material used. To capture the TFT behavior efficiently, the experimental characteristic of an oxide TFT is used to set various SPICE level 3 parameters.
Adaptive artificial neural network based control strategy for shunt active power filter
(IEEE, 2016) Ajmera, Pawan K.; Bansal, Hari Om
Shunt active power filter (SAPF) is used to mitigate the current harmonics and to improve the power factor. In this paper, Adaptive linear-neuron (ADALINE) based phase lock loop (PLL) controlling scheme is presented for SAPF. ADALINE networks estimate the fundamental supply frequency. This scheme detects the phase information of the supply voltage and also used for parallel computing as it provides faster convergence. This algorithm is trained by least-mean squares (LMS) rule which offers low computational burden on the system. In this work, ADALINE is tuned using particle swarm optimization (PSO) technique to improve the dynamic performance of the system. The results obtained are compared with conventional PLL control technique and are found to be significantly better. The performance of the proposed ADALINE based control algorithm is validated using MATLAB/Simulink.