Department of Electrical and Electronics Engineering
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Item VLSI Implementation of a High Performance Barrel Shifter Architecture using Three Different Logic Design Styles(Academy Publisher, 2009-11) Asati, Abhijit; Shekhar, ChandraBarrel shifters are often required for performing data shifting and rotation in many key computer operations from address decoding to computer arithmetic. In this paper we present a comparative study of various parameters like delay, power and area, for a high performance 16-bit barrel shifter VLSI implementations using three different logic design styles (conventional CMOS, transmission gate CMOS and Dual rail Domino CMOS logic) in 0.6mm, N-well CMOS process. The proposed barrel shifter implementations shows better performance as compared to implementation by R. PereiraItem A Purely MUX Based High Speed Barrel Shifter VLSI Implementation Using Three Different Logic Design Styles(Springer, 2012) Asati, Abhijit; Shekhar, ChandraBarrel shifter is one of the important data path elements and widely used in many key computer operations from address decoding to computer arithmetic, using basic operations like data shifting and rotation. In this paper MUX based barrel shifter circuits are designed and implemented in 0.6μm, N-well CMOS process using three different logic design styles, namely, optimized static CMOS, transmission gate (TG) CMOS and dual rail domino CMOS logic. The proposed barrel shifter architecture implementation shows large reduction in the propagation delay, while keeping the almost similar average power consumption as compared to the implementation by Ramin Rafati [10]. A further inter comparison of implementations using three different logic design styles for various performance and characteristic parameters like circuit delay, average power, maximum instantaneous power, leakage Power, transistor count, layout core area, total routing length and number of via are presented